Circuits

= Formal Verification =
 * Hardware Verification Group (HVG) Concordia

= Symbolic Methods =
 * Symbolic Modeling and Analysis of Analog/Mixed-Signal Circuits
 * Symbolic Circuit Analysis
 * DDD
 * Czech projects
 * PraCAn
 * Simplification of Nonlinear DAE Systems with Index Tracking
 * EAS
 * Symbolic Index Calculation

= Model Order Reduction =
 * Towards Improving Simulation of Analog Circuits using Model Order Reduction
 * Model Order Reduction Techniques for Circuit Simulation

= Books =
 * Design of Analog Circuits Through Symbolic Analysis
 * Symbolic analysis for automated design of analog integrated circuits
 * High-Level Modeling and Synthesis of Analog Integrated Systems
 * A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits

= Conferences =
 * Design, Automation and Test in Europe (DATE)
 * International Conference on Computer Aided Design (ICCAD)

= Tools =
 * Analog Insydes
 * Newsletter
 * Publications
 * History
 * Presentation
 * Syrene
 * Verona
 * SPICELib
 * SLiCAP
 * SCAM
 * Maple Syrup
 * Tina
 * Circuit Magic
 * SapWin
 * STAINS
 * QSapecNG
 * SapecNG
 * Circuit Lab